Download Digital Logic Techniques: Principles and Practice by T.J. Stonham PDF

By T.J. Stonham

1 Numerical illustration of information.- 2 Operations on binary data.- three Combinational common sense design.- four Sequential common sense fundamentals.- five layout of sequential common sense circuits.- 6 The electronic system.- 7 sensible electronic circuits.- solutions to difficulties.

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A+B) = A This natural pairing is an example of the principle of duaIity, which states that for every logic system there exists a dual form that performs the same function. The dual form can be obtained by interchanging aII the AND and OR gates and inverting every input and output. C, obtain its dual form and prove that the dual performs the same function as F. C The dual may be obtained by inverting aII inputs and outputs and interchanging AND and OR gates. Hence F 0 Fo is the dual of F. B) + C Inverting both sides to obtain Fo gives Fo reads 'NOT A ANDed with NOT Band then NORed with NOTe'.

They relate AND to NOR and OR to NAND. Distributive Laws A. (A+C) Distribution is a process similar to factorization in arithmetic. B =A (A+B). B A. (A+B) INVERSION is the same as NOT. B In Boolean algebra, as in arithmetic, there is an order of precedence of operations. Bracketed functions are evaluated first, followed by AND, then OR and finally INVERSIONS. C means A ORed with the result of BAND C. It is not C ANDed with the output of A OR B. The latter would have to be written (A+B). C The digital systems engineer must be aware of the principles of Boolean algebra; however it is not necessary to memorize all the theorems.

The K-map looping is Loop 1s for the 1st canonical form. Fa loop 1 t-:;::=~=It=~F:=:j1~- loop 2 Loop 1 covers cells 8 and 9, but by setting all the 'don't cares' to 1, a loop of 8 cells can be drawn. Loop 2 covers cells 5 and 7, which together with 'don't cares' 13 and 14, give a loop of 4. Loop 3 covers ce1l3, and loop 4 is a loop of 4 cells covering all the corners. Therefore Fa = Loop 1 OR loop 2 OR loop 3 OR loop 4 = A + BD + CD + Bi) which can be converted to NAND form by inverting A and replacing each gate with NAND, giving Fa Note in particular loop 4.

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